Cambridge, UK
Cambridge, UK Full-time Permanent Hybrid
The salary range for this role is broad, as we are able to consider varying levels of experience. Any offer made will carefully take into account level of experience (including relevant industry experience), transferable relevant skills and previous relevant achievements.
We will consider part time applications for this role. Please indicate your preferred working schedule in your cover letter.
About usRiverlane's mission is to master quantum error correction (QEC) and unlock a new age of human progress. From advances in material and climate science, to complex chemistry simulation for new drug design, quantum computers will help humanity solve some of its most important challenges. But without QEC, the industry's defining technical challenge, such breakthroughs can never be achieved. Riverlane is the world leader in QEC technology. QEC is a complex problem that requires a range of skills, talent and passion.
Having raised more than $125M in funding to date to accelerate our cutting edge R&D in quantum error correction, Riverlane partners with many of the world's leading quantum hardware providers and government agencies to make fault tolerant quantum computing a reality. We're making remarkable progress and growing fast.
About the roleAs a QEC Researcher (Algorithms) at Riverlane, you'll be part of one of our more forward looking research led science teams working on quantum algorithms and their implementation on future fault tolerant quantum computers.
The team brings together mathematicians, physicists, and chemists, and works closely with leading researchers in quantum algorithms and QEC. A core part of the role is contributing to the academic community through publications and conference participation.
This role focuses on understanding how quantum algorithms perform in realistic fault tolerant settings, taking into account practical error correcting codes, hardware architectures and different qubit modalities.
Your work may include optimising quantum circuit compilation for specific QEC primitives, developing resource and cost models for fault tolerant algorithms, and exploring co design approaches that link algorithms, QEC schemes and hardware assumptions for early fault tolerant devices.
You'll collaborate closely with other QEC teams at Riverlane, including those working on logical operations, decoding and QEC code design across different qubit platforms.
What you will doPlease upload a CV and covering letter by clicking 'Apply'. Your covering letter should explain why you are applying for the job and what skills and experience you can bring to the role.
We review CVs as we receive them and interview as soon as we have applications that look like a good match. We do not use closing dates. So, please apply as soon as possible to avoid missing out on this role.
Equal opportunitiesEveryone is welcome at Riverlane. We are an equal opportunities employer and encourage applications from eligible and suitably qualified candidates regardless of age, disability, ethnicity, gender, gender reassignment, religion or belief, sexual orientation, marital or civil partnership status, or pregnancy and maternity/paternity.
Women and other underrepresented groups may be less likely to apply for a role unless they meet all or nearly all of the requirements. If this applies to you, we still encourage you to apply - you may be a great fit, even if you don't meet every single qualification. We'd love to hear from you.
If you need any adjustments made to the application or selection process so you can do your best, please let us know. We will be happy to help.